Static random access memory (“SRAM”) is a type of volatile memory, i.e., data stored in an SRAM is retained or remains “static” for as long as power is supplied to the memory. A typical SRAM includes an array of memory cells arranged in rows and columns, each cell storing a single bit. Typically, each column and each row includes a large number of memory cells, e.g., columns of 128 memory cells and 128 rows of memory cells. In addition, a typical SRAM includes “word lines” for each row and “bit lines” for each column of the array. A word line is used to enable all of the memory cells in a row for reading or writing. A bit line is used to read or write a bit of data to or from a cell after access to the row has been enabled. Generally, SRAMs are synchronous devices. In other words, read and write operations are synchronized with a reference signal, such as a clock signal.
A “domino SRAM” is a type of SRAM that provides high performance. In a domino SRAM, each column of a memory array is divided into groups, sometimes referred to as “local cell groups.” Each local cell group includes a relatively small number of memory cells, e.g., 4 to 16 cells. A column of 128 memory cells may be divided into 8 local cells groups of 16 cells for example. In addition, local evaluation circuits are provided for the local cell groups. The local evaluation circuits include one or more “dynamic” nodes and are coupled with a bit line provided for the column. Data may be read from or written to a particular memory cell using its local evaluation circuit.